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V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
General Description
The V385A transmitter converts 28 bits of 3.3 V CMOS/TTL into 4 Low Voltage Differential Signaling (LVDS) data streams while the transmit clock input is transmitted in parallel with the data streams over a fifth LVDS link. Compared to the V385, the V385A provides an extended clock frequency range of 12-90 MHz, rather than 20-85 MHz. Other performance improvements have been incorporated as well. The V385A can be programmed for rising edge or falling edge clocks through pin R_FB.
Features
* Extended clock frequency range of 12 to 90 MHz * Pin and function compatible with the National
DS90C385, TI SN65LVDS93 and THine THC63LVDM83, but with extended clock frequency and operating temperature range
* Convert 28 bits of 3.3 V CMOS/TTL into 4 LVDS
streams
* Up to 2.52 Gbps throughput or 315 Megabytes/sec
bandwidth
Pin Assignment
VCC TxIN5 TxIN6 TxIN7 GND TxIN8 TxIN9 TxIN10 VCC TxIN11 TxIN12 TxIN13 GND TxIN14 TxIN15 TxIN16 R_FB TxIN17 TxIN18 TxIN19 GND TxIN20 TxIN21 TxIN22 TxIN23 VCC TxIN24 TxIN25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 TxIN4 TxIN3 TxIN2 GND TxIN1 TxIN0 TxIN27 LVDS_GND TxOUT0TxOUT0+ TxOUT1TxOUT1+ LVDS_VCC LVDS_GND TxOUT2TxOUT2+ TxCLKOUTTxCLKOUT+ TxOUT3TxOUT3+ LVDS_GND PLL_GND PLL_VCC PLL_GND PWRDWN TxCLKIN TxIN26 GND
* * * * * * * * * *
Spread spectrum compatible Supports SD, HD and VGA graphics applications LVDS voltage swing of 350 mV for low EMI On-chip PLL requires no external components Single 3.3 V low-power CMOS design Operating temperature of 0 to +70C Programmable rising or falling edge strobe Power-down control function Compatible with TIA/EIA-644 LVDS standards Packaged in a 56-pin TSSOP (Pb free available)
Block Diagram
Red, Green, Blue HSYNC VSYNC DATA ENABLE CONTROL TxOUT2R_FB PWRDWN CLOCK PLL TxCLKOUTTxOUT3+ TxOUT3TxCLKOUT+ TTL to LVDS TxOUT1TxOUT2+ 24 TxOUT0+ TxOUT0TxOUT1+
56-pin TSSOP
V385A Datasheet
1
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
Pin Descriptions
Pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
Pin Type
Power CMOS/TTL CMOS/TTL CMOS/TTL Ground CMOS/TTL CMOS/TTL CMOS/TTL Power CMOS/TTL CMOS/TTL CMOS/TTL Ground CMOS/TTL CMOS/TTL CMOS/TTL CMOS/TTL CMOS/TTL CMOS/TTL CMOS/TTL Ground CMOS/TTL CMOS/TTL CMOS/TTL CMOS/TTL Power CMOS/TTL CMOS/TTL Ground CMOS/TTL CMOS/TTL CMOS/TTL Ground Power Ground Ground
Pin Name
VCC TxIN5 TxIn6 TxIn7 GND TxIN8 TxIN9 TxIN10 VCC TxIN11 TxIN12 TxIN13 GND TxIN14 TxIN15 TxIN16 R_FB TxIN17 TxIN18 TxIN19 GND TxIN20 TxIN21 TxIN22 TxIN23 VCC TxIN24 TxIN25 GND TxIN26 TxCLKIN PWRDWN PLL_GND PLL_VCC PLL_GND LVDS_GND
Pin Description/Name
3.3V Power Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Ground Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). 3.3V Power Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Ground Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Programmable strobe select input pin (R_FB). High = rising edge; Low = falling edge. Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Ground Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). 3.3V Power Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Ground Parallel digital video input pins (TxIN0..27). Clock input (TxCLKIN) Active low. Powerdown tri-states outputs. Ground 3.3V Power Ground Ground
V385A Datasheet
2
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
Pin
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
Pin Type
LVDS LVDS LVDS LVDS LVDS LVDS Ground Power LVDS LVDS LVDS LVDS Ground CMOS/TTL CMOS/TTL CMOS/TTL Ground CMOS/TTL CMOS/TTL CMOS/TTL
Pin Name
TxOUT3+ TxOUT3TxCLKOUT+ TxCLKOUTTxOUT2+ TxOUT2LVDS_GND LVDS_VCC TxOUT1+ TxOUT1TxOUT0+ TxOUT0LVDS_GND TxIN27 TxIn0 TxIn1 GND TxIn2 TxIn3 TxIn4
Pin Description/Name
LVDS output (+) LVDS output (-) LVDS output (+) LVDS output (-) LVDS output (+) LVDS output (-) Ground 3.3V Power LVDS output (+) LVDS output (-) LVDS output (+) LVDS output (-) Ground Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Ground Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27). Parallel digital video input pins (TxIN0..27).
External Components
The V385A requires no external components.
V385A Datasheet
3
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the V385A. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item
Supply Voltage, VDD All Inputs and Outputs Electrostatic Discharge (EIAJ, 0, 200 pF) Ambient Operating Temperature Storage Temperature Junction Temperature Maximum Soldering Temperature -0.3 V to +4 V -0.3 V to VCC+0.3 V > 500 V
Rating
0 to +70C
-65 to +150C 150C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
0 3.0
Typ.
3.3
Max.
+70 3.6
Units
C V
Electrical Characteristics
VDD=3.3 V 10%, Ambient temperature 0 to +70C Parameter
CMOS/TTL DC Specifications Input High Voltage Input Low Voltage Input Current Power-down Current LVDS DC Specifications Differential Output Voltage Change in VOD Between Complimentary Output States Common Mode Voltage Change in VCM Between Complimentary Output States Output Short Circuit Current Output Tri-State Current VOD RL = 100 ohms 250 345 450 35 1.125 1.250 1.375 35 VOD=0V Power Down#=0V 3.5 1 5 10 mV mV V mV mA A VIH VIL IIN IPD GNDSymbol
Conditions
Min.
Typ.
Max.
Units
Freq.
VOD
VCM
VCM
IOS IOZ
V385A Datasheet
4
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
Parameter
TxCLK IN Transition Time TxCLK IN Period TxCLK IN High Time TxCLK IN Low Time TxIN Transition Time LVDS Low-to-High Time LVDS High-to-Low Time Transmitter Output Pulse Position
Symbol
TCIT TCIP TCIH TCIL TXIT LLHT LHLT TPPos0 TPPos1 TPPos2 TPPos3 TPPos4 TPPos5 TPPos6 Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6
Conditions
Min.
Typ.
Max.
5
Units
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ns ns
Freq.
Recommended Transmitter Input Characteristics 11.11 0.35T 0.35T 1.5 0.75 0.75 -0.2 T/7-0.2 2T/7-0.2 3T/7-0.2 4T/7-0.2 5T/7-0.2 6T/7-0.2 2.5 0.5 10 30 0 T/7 2T/7 3T/7 4T/7 5T/7 6T/7 T 0.5T 0.5T 83.333 0.65T 0.65T 6 1.4 1.4 0.2 T/7+0.2 2T/7+0.2 3T/7+0.2 4T/7+0.2 5T/7+0.2 6T/7+0.2 10
Transmitter Switching Characteristics
85 MHz 85 MHz 85 MHz 85 MHz 85 MHz 85 MHz 85 MHz
Transmitter Phase Loop Set TxIN Setup to TxCLK IN TxIN Hold to TxCLK IN TxCLK IN to TxCLK OUT Delay
TPLLS TSTC THTC TCCD
ns
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
84 76 67 50
Max.
Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
JC
V385A Datasheet
5
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
AC Timing Diagrams
TCIP TCIH
~3.3V
TxCLKIN
~0V
1.5V 0.8V
2.0V
TCIL TSTC THTC
~3.3V
TxIN[27:0]
~0V
2.0V 0.8V
Data is sampled on the falling edge of clock (pin R_FB = 0)
Figure AC1. Transmitter Setup/Hold and High/Low Times (Falling Edge Strobe or R_FB=0)
TxCLK IN TxCLK OUT+ TCCD
TxCLK OUT-
Figure AC2. Clock IN to Clock OUT Delay (Rising Edge Strobe or R_FB=1)
PWRDWN# VCC TxCLK IN Unknown TPLLS
Figure AC3. Phase Lock Loop Set Time
V385A Datasheet
6
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
TxCLKIN Input 10%
90%
90%
TxIN[27:0] Input 10% 10%
90%
90%
10% TXIT TXIT
TCIT
TCIT
LVDS Output 10%
90%
90% LVDS Output Test Circuit 5 pF 100
10% LLHT LHLT
Figure AC4. Transmitter Device Transition Times and Load
TxCLK OUT+ TxOUT3 TxIN27-1 TxIN27-1 TxOUT2 TxIN20-1 TxIN19-1 TxOUT1 TxIN9-1 TxOUT0 TxIN1-1 TPPos0 TPPos1 TPPos2 TPPos3 TPPos4 TPPos5 TPPos6 TxIN0-1 TxIN7 TxIN6 TxIN4 TxIN3 TxIN2 TxIN1 TxIN8-1 TxIN18 TxIN15 TxIN14 TxIN13 TxIN12 TxIN9 TxIN26 TxIN25 TxIN24 TxIN22 TxIN21 TxIN20 TxIN23 TxIN17 TxIN16 TxIN11 TxIN10 TxIN5
Figure AC5. Transmitter LVDS Output Pulse Position Measurement
V385A Datasheet
7
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m
V385A
8-BIT LVDS TRANSMITTER FOR VIDEO
Package Outline and Package Dimensions (56-pin TSSOP)
Package dimensions are kept current with JEDEC Publication No. 95
56
Millimeters Symbol
E1 INDEX AREA E
A A1 A2 b C D E E1 e L a aaa
Inches* Min Max
Min
Max
12 D
-- 1.20 0.05 0.15 0.80 1.05 0.17 0.27 0.09 0.20 13.90 14.10 8.10 BASIC 6.00 6.20 0.50 BASIC 0.45 0.75 0 8 -- 0.10
-- 0.047 0.002 0.006 0.032 0.041 0.007 0.011 0.0035 0.008 0.547 0.555 0.319 BASIC 0.236 0.244 0.020 BASIC 0.018 0.030 0 8 -- 0.004
A 2 A 1
A
* For reference only. Controlling dimensions in mm.
c
-Ce
b SEATING PLANE
L
aaa C
Ordering Information
Part / Order Number V385AGLF V385AGLFT Marking V385AGLF V385AGLF Shipping Packaging
Tubes Tape and Reel
Package
56-pin TSSOP 56-pin TSSOP
Temperature
0 to +70 C 0 to +70 C
Notes
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
V385A Datasheet
8
11/23/05
Revision 0.1
I n t e g r a t e d C i r c u i t S y s t e m s * 5 2 5 R a c e St r e e t , S a n J o s e , C A 9 5 1 2 6 * t e l ( 4 0 8) 2 97 - 1 2 0 1 * w ww. i c s t . co m

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